MPVZ5150 rev 1, 05/2010 freescale semiconductor ? freescale semiconductor, inc., 2006, 2010. all rights reserved. pressure integrated silicon pressure sensor on-chip signal conditioned, temperature compensated and calibrated the MPVZ5150 series piezoresistive transducer is a state-of-the-art monolithic silicon pressure sensor designed for a wide range of applications, but particularly those employing a microcontroller or microprocessor with a/d inputs. this patented, single element transducer combines advanced micromachining techniques, thin-film metallization, and bipolar processing to provide an accurate, high level analog output signal that is proportional to the applied pressure. features ? 2.5% maximum error over 0 to 85 c ? ideally suited for mi croprocessor or microcontroller-based systems ? patented silicon shear stress strain gauge ? available in gauge surface mount (smt) or through hole (dip) configurations ? increased media compatibility ordering information device name package options case no. # of ports pressure type device marking none single dual gauge differential absolute small outline package (media resistant gel) (MPVZ5150 series) MPVZ5150gc6t1 tape & reel 482a ? ? MPVZ5150g MPVZ5150gc7u rail 482c ? ? MPVZ5150g series 0 to 150 kpa (0 to 21.75 psi) 0.2 to 4.7 v output MPVZ5150 small outline packages MPVZ5150gc7u case 482c MPVZ5150gc6t1 case 482a typical applications ? level indicators ? process control ? pump/motor control ? pressure switching
MPVZ5150 sensors 2 freescale semiconductor pressure operating characteristics table 1. operating characteristics ( v s = 5.0 vdc, t a = 25c unless otherwise noted, p1 > p2. decoupling circuit shown in figure 3 required to meet elec trical specifications.) characteristic symbol min typ max unit pressure range (1) 1. 1 kpa (kilopascal) equals 0.145 psi. p op 0 ? 150 kpa supply voltage (2) 2. device is ratiometric within this specified excitation range. v s 4.75 5.0 5.25 v dc supply current i o ? 7.0 10 madc minimum pressure offset (3) (0 to 85c) @ v s = 5.0 v 3. offset (v off ) is defined as the output voltage at the minimum rated pressure. v off 0.088 0.200 0.313 v dc full scale output (4) differential and absolute (0 to 85c) @ v s = 5.0 v 4. full scale output (v fso ) is defined as the output voltage at the maximum or full rated pressure. v fso 4.588 4.700 4.813 v dc full scale span (5) differential and absolute (0 to 85c) @ v s = 5.0 v 5. full scale span (v fss ) is defined as the algebraic difference between the output vo ltage at full rated pressure and the output voltage at the minimum rated pressure. v fss ? 4.500 ? v dc accuracy (6) 6. accuracy (error budget) consists of the following: linearity: output deviation from a stra ight line relationship with pressure over the specified pressure range. temperature hysteresis: output deviation at any temperature within the operating temperature range, after the temperature is cyc led to and from the minimum or maximum operating temperature points, with zero differential pressure applied. pressure hysteresis: output deviati on at any pressure within the specified range, when this pressure is cycled to and from minim um or maximum rated pressure at 25c. tcspan: output deviation over the temperature range of 0 to 85c, relative to 25c. tcoffset: output deviation with minimum pr essure applied over the temperature range of 0 to 85c, relative to 25c. variation from nominal: the variation from nominal values , for offset or full scale span, as a percent of v fss at 25c. ? sensitivity v/p ? 30 ? mv/kpa response time (7) 7. response time is defined as the time for the incremental changed in the output to go from 10% to 90% of its final value when subjected to a specified step change in pressure. t r ? 1.0 ? ms output source current at full scale output i o+ ? 0.1 ? madc warm-up time (8) 8. warm-up time is defined as the time required for the product to meet the specified output voltage after the pressure has been stabilized. ? ? 20 ? ms offset stability (9) 9. offset stability is the product?s output deviation when subjected to 1000 hours of pu lsed pressure, temperature cycling with bias test. ? ? 0.5 ? %v fss
MPVZ5150 sensors freescale semiconductor 3 pressure maximum ratings figure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip. figure 1. fully integrated pressure sensor schematic table 2. maximum ratings (1) 1.exposure beyond the specified limits may c ause permanent damage or degradation to the device. rating symbol value unit maximum pressure (p1 > p2) p max 400 kpa storage temperature t stg -40 to +125c c operating temperature t a -40 to +125c c v s sensing element v out gain stage # 2 and ground reference shift circuitry pins 1 and 5 through 8 are no connects gnd thin film temperature compensation and gain stage # 1 2 4 3
MPVZ5150 sensors 4 freescale semiconductor pressure on-chip temperature compensation and calibration figure 2 illustrates the differential/gauge sensing chip in the basic chip carrier (case 867). a fluorosilicone gel isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the sensor diaphragm. the MPVZ5150 series pressure sensor operating characteristics, and internal reliability and qualification tests are based on use of dry air as the pressure media. media, other than dry air, may have adverse effects on sensor performance and long-term reliability. contact the factory for information regarding media compatibility in your application. figure 4 shows the sensor output signal relative to pressure input. typical, minimum, and maximum output curves are shown for operation over a temperat ure range of 0 to 85c using the decoupling circuit shown in figure 3 . the output will saturate outside of the specified pressure range. figure 3 shows the recommended decoupling circuit for interfacing the output of the in tegrated sensor to the a/d input of a microprocessor or microcontroller. proper decoupling of the power supply is recommended. figure 2. cross-sectional diagram (not to scale ) figure 3. recommended power supply decoupling and output filtering (for additional output filtering, please refer to application note an1646) figure 4. output vs. pressure differential gel die coat wire bond die p1 stainless steel cap thermoplastic case die bond differential sensing element p2 lead frame +5 v 1.0 f 0.01 f 470 pf gnd v s v out ips output output voltabe (v) 5 4 3 0 15 30 45 60 75 90 2 1 0 span range (typ) output range (typ) offset pressure (kpa) (typ) 105 120 135 150 v out = v s *(0.006*p(kpa)+0.04) (pe * tm * 0.006 * vs) v s = 5.0 v 0.25 vdc pe = 3.75 kpa tm = 1 @ 0 to 85c tm = 3 @ +125c tm = 3 @ -40c vs = 5.0 v +/- 0.25 vdc max typ min
MPVZ5150 sensors freescale semiconductor 5 pressure transfer function (MPVZ5150 series) n ominal transfer value: v out = v s x (0.006 x p (kpa) + 0.04) (pressure error x temp. mult. x 0.006 x v s ) v s = 5.0 v 0.25 vdc temperature error multiplier MPVZ5150 series temp multiplier 4.0 3.0 2.0 0.0 1.0 -40 -20 0 20 40 60 140 120 100 80 - 40 3 0 to 85c 1 +125 3 break points temperature in c note: the temperature multiplier is a linear response from 0 to -40c and from 85 to 125c. pressure error band pressure in kpa 3.0 2.0 1.0 -1.0 -2.0 -3.0 0.0 0 25 50 75 100 125 150 pressure error (max) 0 to 150 kpa 3.75 kpa error (kpa) error limits for pressure MPVZ5150 series 4.0 -4.0
MPVZ5150 sensors 6 freescale semiconductor pressure pressure (p1)/vacuum (p2) side identification table freescale designates the two si des of the pressure sensor as the pressure (p1) side and the vacuum (p2) side. the pressure (p1) side is the side containing fluorosilicone gel which protects the die from harsh media. the mpx pressure sensor is designed to operat e with positive differential pressure applied, p1 > p2. the pressure (p1) side may be identified by using the table below: minimum recommended footprint fo r surface mounted applications surface mount board la yout is a critical portion of the total design. the footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the board and the package. with the correct footprint, the packages will se lf align when subjected to a solder reflow process. it is always recommended to design boards with a solder mask layer to avoid bridging and shorting between solder. figure 5. small outline package footprint part number case type pressure (p1) side identifier MPVZ5150gc6t1 482a side with port attached MPVZ5150gc7u 482c side with port attached
MPVZ5150 sensors freescale semiconductor 7 pressure package dimensions case 482a-01 issue a small outline package case 482c-03 issue b small outline package dim min max min max millimeters inches a 10.54 0.425 0.415 10.79 b 10.54 0.425 0.415 10.79 c 12.70 0.520 0.500 13.21 d 0.96 0.042 0.038 1.07 g 0.100 bsc 2.54 bsc h 0.002 0.010 0.05 0.25 j 0.009 0.011 0.23 0.28 k 0.061 0.071 1.55 1.80 m 0 7 0 7 n 0.444 0.448 11.28 11.38 s 0.709 0.725 18.01 18.41 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006). 5. all vertical surfaces 5 typical draft. s d g 8 pl 4 5 8 1 s b m 0.25 (0.010) a s t ?a? ?b? c m j k pin 1 identifier h seating plane ?t? n v w v 0.245 0.255 6.22 6.48 w 0.115 0.125 2.92 3.17 dim min max min max millimeters inches a 10.54 0.425 0.415 10.79 b 10.54 0.425 0.415 10.79 c 12.70 0.520 0.500 13.21 d 0.66 0.034 0.026 0.864 g 0.100 bsc 2.54 bsc j 0.009 0.011 0.23 0.28 k 0.100 0.120 2.54 3.05 m 0 15 0 15 n 0.444 0.448 11.28 11.38 s 0.540 0.560 13.72 14.22 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006). 5. all vertical surfaces 5 typical draft. 6. dimension s to center of lead when formed parallel. pin 1 k seating plane ?t? s g 4 5 8 1 ?a? ?b? c n v w m j v 0.245 0.255 6.22 6.48 w 0.115 0.125 2.92 3.17 identifier d 8 pl s b m 0.25 (0.010) a s t detail x detail x
MPVZ5150 rev. 1 05/2010 how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor china ltd. exchange building 23f no. 118 jianguo road chaoyang district beijing 100022 china +86 10 5879 8000 support.asia@freescale.com for literature requests only: freescale semiconductor lite rature distribution center 1-800-441-2447 or +1-303-675-2140 fax: +1-303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale and the freescale logo are trademarks of freescale semiconductor, inc., reg. u.s. pat. & tm. off. all other produc t or service names are the property of their respective owners. ? freescale semiconductor, inc. 2010. all rights reserved.
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